In most write-through cache organizations, the read and write miss penalties are the same.
If we assume that the write buffer stalls are negligible, we can combine the reads and writes by using a single miss rate and the miss penalty:
Memory-stall clock cycles = ( Memory accesses / Program ) × Miss rate × Miss penalty = ( Instructions / Program ) ×
( Misses / Instruction ) × Miss penalty
To capture the fact that the time to access data for both hits and misses affects performance, designers sometime use average memory access time (AMAT) as a way to examine alternative cache designs.
Average memory access time is the average time to access memory considering both hits and misses and the frequency of different accesses; it is equal to the following:
AMAT = Time for a hit + Miss rate × Miss penalty
Question: Calculating Average Memory Access Time (AMAT)
Assume that the read and write miss penalties are the same and ignore other write stalls.
Find the AMAT for a processor with
a 2 ns clock cycle time,
a miss penalty of 20 clock cycles,
a miss rate of 0.05 misses per instruction, and
a cache access time (including hit detection) of 1 clock cycle.
The average memory access time per instruction is
AMAT = Time for a hit + Miss rate × Miss penalty = 1 + 0.05 × 20
= 2 clock cycles or 4 ns
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