CSCI 370 Computer Architecture: Homework 5

CSCI 370 Computer Architecture: Homework 5

Due date (firm): On or before Thursday, May 2, 2024
Absolutely no copying others’ works

Name: _________________________

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This homework is intended to help you understand the relationship between forwarding, hazard detection, and ISA (instruction set architecture) design. Problems in this exercise refer to the following sequence of instructions, and assume that it is executed on a 5-stage pipelined datapath:

             I1: add  $5, $2, $1
             I2: lw   $3, 4($5)
             I3: lw   $2, 0($2)
             I4: or   $3, $5, $3
             I5: sw   $3, 0($5)

(20%) Indicate dependences and their types (i.e., RAR, RAW, WAR, or WAW).
^†Each dependence includes a type, a register, and two different instructions; e.g., RAW on $5 for I1 and I2.
Ans>
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(10%) If there is no forwarding or hazard detection, insert nops to ensure correct execution.
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(10%) Now, change and/or rearrange the code to minimize the number of nops needed. You can assume register $t0 can be used to hold temporary values in your modified code.
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(10%) If the processor has forwarding, but we forgot to implement the hazard detection unit, what happens when the original code executes?
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(20%) If there is forwarding, for the first seven cycles during the execution of this code, complete the table below and specify the following control signal values of the original code:

PCWrite from the hazard detection unit,
IF/IDWrite from the hazard detection unit,
ForwardA from the forwarding unit for the upper multiplexor of an ALU input, and
ForwardB from the forwarding unit for the lower multiplexor of an ALU input

in each cycle by hazard detection and forwarding units in the figure in Slide 14.12. The control values for the forwarding multiplexors are given in the table in Slide 14.10.
^†Use the symbols “***,” “---,” and “X” to represent a stall, a flush, and “Don’t care,” respectively.
Ans>

Instruction Sequence	First Seven Cycles
Instruction Sequence	1	2	3	4	5	6	7	8
`add $5, $2, $1`	IF	ID	EX	MEM	WB
`lw $3, 4($5)`
`lw $2, 0($2)`
`or $3, $5, $3`
`sw $3, 0($5)`
	`PCWrite`= `IF/IDWrite`= `ForwardA`= `ForwardB`=	`PCWrite`= `IF/IDWrite`= `ForwardA`= `ForwardB`=	`PCWrite`= `IF/IDWrite`= `ForwardA`= `ForwardB`=	`PCWrite`= `IF/IDWrite`= `ForwardA`= `ForwardB`=	`PCWrite`= `IF/IDWrite`= `ForwardA`= `ForwardB`=	`PCWrite`= `IF/IDWrite`= `ForwardA`= `ForwardB`=	`PCWrite`= `IF/IDWrite`= `ForwardA`= `ForwardB`=

(10%) If there is no forwarding, what new inputs and output signals do we need for the hazard detection unit in the figure in Slide 14.12? Using this instruction sequence as an example, explain why each signal is needed.
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(20%) For the new hazard detection unit (without forwarding) from the previous problem, complete the table below and specify which output signals it asserts in each of the first six cycles during the execution of this code using the figure in Slide 14.12.
^†Use the symbol “***” to represent a stall and the symbol “---” for a flush.
Ans>

Instruction Sequence	First Six Cycles
Instruction Sequence	1	2	3	4	5	6
`add $5, $2, $1`	IF	ID	EX	MEM	WB
`lw $3, 4($5)`
`lw $2, 0($2)`
`or $3, $5, $3`
`sw $3, 0($5)`
	`PCWrite`= `IF/IDWrite`= `bubble`=	`PCWrite`= `IF/IDWrite`= `bubble`=	`PCWrite`= `IF/IDWrite`= `bubble`=	`PCWrite`= `IF/IDWrite`= `bubble`=	`PCWrite`= `IF/IDWrite`= `bubble`=	`PCWrite`= `IF/IDWrite`= `bubble`=