CSCI 370 Computer Architecture: Homework 4 Solutions

Due date: On or before Monday, April 22, 2024
Absolutely no copying others’ works 		Name: _____Professor Hu_____
  1. Consider the following instruction mix:

    R-type I-type (non-lw) Load Store Branch Jump
    15% 30% 25% 10% 15% 5%

    1. (10%) What fraction of all instructions use data memory?
      Ans>
        25% + 10% = 35% because only load and store use data memory.

    2. (10%) What fraction of all instructions use instruction memory?
      Ans>
        100% because every instruction must be fetched from instruction memory before it can be executed.

    3. (10%) What fraction of all instructions use the sign extend (SE)?
      Ans>
        30% + 25% + 10% + 15% = 80% because only R-type and Jump instructions do not use the sign extender.

    4. (10%) What is the sign extend doing during cycles in which its output is not needed?
      Ans>
        To simplify the design, the sign extend produces an output during every cycle. If its output is not needed, it is simply ignored.

  2. In this exercise we examine in detail how an instruction is executed in a single-cycle datapath. Use the slides, NOT textbook, to answer the following questions, especially the Slide 12.10 and 12.13 figures as follows:


    Problems in this exercise refer to a clock cycle in which the processor fetches the following instruction word: 
         0001 0000 0010 0011 0000 0000 0000 1100
   = 000100 00001 00011 0000000000001100
   = opcode   rs    rt       offset
   = beq  rs, rt, label
   = beq  $1, $3, 12
    Check the Appendix A.10 of the textbook to find out what this instruction is. Assume that data memory is all zeros and that the processor’s registers have the following values at the beginning of the cycle in which the above instruction word is fetched:

    $0 $1 $2 $3 $4 $5 $6 $8 $12 $31
    0 10 -5 8 -1 20 4 -4 15 -10

    1. (10%) What are the values of ALU control unit’s inputs for this instruction (the ALU control unit is shown in the figure of Slide 12.12)?
      Ans>
        Opcode6 = 000100 and funct6 = 001100

    2. (14%) What is the new PC address after this instruction is executed? Specify all paths through which this value is determined.
      †Hint: Use PC to represent the program counter or its content (a bit string).
      Ans>
      • New PC (30 bits) = PC (30 bits) + 1
      • Path: PC ⇒ INC ⇒ Mux (PCSrc) ⇒ PC (because $1 != $3)

        (For your information) If $1 == $3, then there are two paths as follows:

        • Path 1: PC ⇒ I-Mem ⇒ SE ⇒ Add (adding offset) ⇒ Mux (J) ⇒ Mux (PCSrc) ⇒ PC
        • Path 2: PC ⇒ I-Mem ⇒ Regs ⇒ Mux (ALUSrc) ⇒ ALU ⇒ Mux (PCSrc) ⇒ PC

    3. (12%) For each mux, show the values of its inputs and outputs during the execution of this instruction. †Hint:
      • Use PC to represent the program counter or its content (a bit string).
      • If the control signal for a mux is X (don’t care), show both output values for control signal values 0 and 1.
      • The default value for a register number is 0.
      • The memory content at the address, addr, is Mem[addr].
      Ans>
      • WrReg Mux (RegDst):
        • Inputs: 3 and 0 (default)
        • Output (control signal is X):
          • 3 (if control signal is 0)
          • 0 (default if control signal is 1)

      • ALU Mux (ALUSrc):
        • Inputs: 8 and 12
        • Output: 8

      • Mem/ALU Mux (MemtoReg):
        • Inputs: 2 and Mem[2]
        • Output (control signal is X):
          • 2 (if control signal is 0)
          • Mem[2] (if control signal is 1)

      • Jump Mux (J) (30 bits):
        • Inputs: PC (30 bits) + 1 + 12 and jump target address
        • Output: PC (30 bits) + 1 + 12

      • PC Mux (PCSrc) (30 bits):
        • Inputs: PC (30 bits) + 1 + 12 and PC (30 bits) + 1
        • Output: PC (30 bits) + 1

    4. (12%) What are the input values for the ALU and the two add units?
      †Hint: Use PC to represent the program counter or its content (a bit string).
      Ans>
      • ALU: 10 and 8
      • Add (PC+1) (30 bits): PC (30 bits) and 1
      • Add (Branch) (30 bits): PC (30 bits) + 1 and 12

    5. (12%) What are the values of all inputs for the registers unit?
      †Hint:
      • The answer could be X (don’t care).
      • The default value for a register number is 0.
      Ans>
      • Read Register 1 (RA): 1
      • Read Register 2 (RB): 3
      • Write Register (RW): X
      • Write Data (BusW): X
      • RegWrite: 0