MIPS


MIPS (Microprocessor without Interlocked Pipeline Stages) is a reduced instruction set computing (RISC) instruction set architecture (ISA) developed by MIPS Technologies. Multiple revisions of the MIPS instruction set exist.

The early MIPS architectures were 32-bit, while later versions were 64-bit. The versions include MIPS I, MIPS II, MIPS III, MIPS IV, MIPS V, MIPS32, and MIPS64. The current revisions are MIPS32 (for 32-bit implementations) and MIPS64 (for 64-bit implementations).

MIPS32 and MIPS64 define a control register set as well as the instruction set. The MARS, a MIPS32 simulator, will be used in this course. The figure shows different versions of MIPS32.