Measuring Cache Performance
CPU time can be divided into the clock cycles that the CPU spends executing the program and the clock cycles that the CPU spends waiting for the memory system.
Normally, we assume that the costs of cache accesses that are hits are part of the normal CPU execution cycles.
Thus,
CPU time = ( CPU execution clock cycles +
Memory-stall clock cycles ) × Clock cycle time
The memory-stall clock cycles come primarily from cache misses, and we make that assumption here.
Memory-stall clock cycles can be defined as the sum of the stall cycles coming from reads plus those coming from writes:
Memory-stall clock cycles = Read-stall cycles +
Write-stall cycles
The read-stall can be defined in terms of the number of read accesses per program, the miss penalty in clock cycles for a read, and the read miss rate:
Read-stall cycles = ( Reads / Program ) ×
Read miss rate × Read miss penalty
Writes are more complicated.
For a write-through scheme, we have two sources of stalls:
- Write misses, which usually require that we fetch the block before continuing the write, and
- Write buffer stalls, which occur when the write buffer is full when a write occurs.
Thus, the cycles stalled for writes equal the sum of these two:
Write-stall cycles = [ ( Writes / Program ) ×
Write miss rate × Write miss penalty ] +
Write buffer stalls