Cache Basics Review I

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A list of 32-bit memory address references is given as word addresses. Assume a direct-mapped cache with 16 one-word blocks. For each of these references, identify the following fields of the binary address:

Tag = address in binary shifted left or right by bits       Index = address % (modulo)

Assume the cache is initially empty. Below is a list of memory references:

#	Address	Address in Binary	Cache Index	(H)it/(M)iss
1	1	... 0000 00012	1	M
2	134	... 1000 01102
3	212	... 1101 01002
4	1	... 0000 00012
5	135	... 1000 01112
6	213	... 1101 01012
7	162	... 1010 00102
8	161	... 1010 00012
9	2	... 0000 00102
10	44	... 0010 11002
11	41	... 0010 10012
12	221	... 1101 11012

Assume a direct-mapped cache has the features: (i) 64 KiB cache data size, (ii) 1-word cache block size, and (iii) a 32-bit byte-addressed cache reference.

The total number of bits in the cache = Kibibits