The main control generates ten control signals, which are solely based on the opcode field (bits 31 to 26) of the instruction. The following table shows the effect of each of the ten control signals.
| Signal | Effect when ‘0’ | Effect when ‘1’ |
|---|---|---|
RegDst |
Destination register = rt |
Destination register = rd |
RegWrite |
None | Destination register is written with the data value on BusW. |
ExtOp |
16-bit immediate is zero-extended. | 16-bit immediate is sign-extended. |
ALUSrc |
Second ALU operand comes from the second register file output (BusB). |
Second ALU operand comes from the extended 16-bit immediate. |
MemRead |
None | Data memory is read.
Data_out ← Memory[address] |
MemWrite |
None | Data memory is written.
Memory[address] ← Data_in |
MemtoReg |
BusW = ALU result |
BusW = Data_out from memory |
Beq & Bne |
PC ← PC + 4 | PC ← branch target address if branch is taken |
J |
PC ← PC + 4 | PC ← jump target address |
A hardware unit worth mentioning is the multiplexor, which is used from time to time.
- When the 1-bit control to a two way multiplexor is asserted, the multiplexor selects the input corresponding to 1.
- Otherwise, if the control is deasserted, the multiplexor selects the 0 input.
The multiplexor has two data inputs (A and B), which are labeled 0 and 1, and one selector input (S), as well as an output C.
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