Single-Cycle Datapath with the Control Unit
The following figure shows the datapath with main control and ALU control and the control signals.
The input to the main control unit is the 6-bit opcode field from the instruction.
The outputs of the main control unit consist of 10 1-bit control signals:
- three signals that are used to control multiplexors (
RegDst
, ALUSrc
, and MemtoReg
),
- three signals for controlling reads and writes in the register file and data memory (
RegWrite
, MemRead
, and MemWrite
),
- three signals sent to the “Next PC” logic for determining whether to possibly jump, branch-on-equal, or branch-on-not-equal, and
- a signal for sign-extending 16-bit immediate to 32 bits.
“Don’t go looking for boys in the dark.
They will say pretty things then leave you with scars.
Do go looking for boys in the park.
For that is where the true gentlemen are.”
― Anna Godbersen, The Luxe
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